3D InCites

Mind the Gap! SEMATECH’s EMA’s Prepare 3D Tools for HMV Readiness

Jan. 23, 2012

Last week, SEMATECH and ISMI announced they would be conducting Equipment Maturity Assessments (EMAs) of several critical 3D tools during 2012 to establish functional equipment capabilities and address high volume manufacturing (HVM) maturity issues for 3D IC manufacturing. This is a significant step in SEMATECH’s goal to accelerate the 3D technology revolution. To find out more about this, Read More>>

From Different Dimensions

The Why and How of Fine-Grain 3D Integration

Jan. 23, 2012

In today's post on his blog on MonolithIC 3D, Chief Scientist, Deepak Sekar, discusses why TSV pitches smaller than 500nm are useful and how one can achieve that. Evolutionary advances with today's TSV technology as well as radically new monolithic 3D approaches are options:The Silicon Valley IEEE Components, Packaging and Manufacturing Technology (CPMT) Society invited me to give a talk on " Read More>>

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Mitsubishi Throws its Hat in the 300mm Wafer Bonding Ring

By Francoise von Trapp On Jan. 18, 2012

Earlier this week, Mitsubishi Heavy Industries, Ltd. announced it had “developed the world's first fully automated 12-inch (300 millimeters) wafer bonding machine, capable of producing 3-dimensionally integrated LSI (large-scale integration) circuits at room temperature.” This tool is targeted to the MEMS, 3D LSI's, and the RF market. I was skeptical of the words “world’s first” when I know Read More>>

Ziptronix Direct Oxide Bond Technology Gains Momentum

By Francoise von Trapp On Dec. 21, 2011

At RTI’s 3D ASIP last week, I sat down with Paul Enquist, of Ziptronix, to get an update on the company’s progress with its direct bonding technologies. Paul presented on Day 2 of the conference, but honored me with a one-on-one explanation on the application space enabled by the company’s two proprietary processes, Zibond and Direct Bond Interconnect (DBI). Zibond is the direct oxide bond Read More>>

The Great 3D Supply Chain Debate: The Handoff

By Francoise von Trapp On Dec. 20, 2011

The supply chain business model for manufacturing 3D stacked ICS has caused perhaps one of the hottest debates so far in commercializing 3D semiconductor processes. It’s easy to see why. Beyond the rather obvious question of who will own the liability of damaged devices, there’s a good deal of revenue at stake for those who make the investment in adding capacity for middle end of the line (MEOL) Read More>>

Invensas and ALLVIA Collaboration Results in Full 3D R&D Line; Paves the Way for 3D Manufacturing

By Francoise von Trapp On Nov. 03, 2011

Earlier this week Invensas Corporation, a wholly-owned subsidiary of Tessera Technologies, Inc., announced both its acquisition of ALLVIA’s patent assets, and a two-year collaborative partnership with ALLVIA to further develop technology and intellectual property (IP) in the 3-dimensional integrated circuit (3D-IC) packaging space. This strategic alliance is expected to optimize the strengths of Read More>>

Perspectives on 3D Integration: The Researchers

By Francoise von Trapp On Oct. 13, 2011

To listen to John Lau, of ITRI, speak on the topic of 3D integration is to experience a passion for technology that rivals no other; except perhaps that of Rao Tummala of Georgia Tech. But John is definitely more vocal in his passion. Rao has a softer, gentler approach. At this year’s IWLPC in Santa Clara, both expressed their perspectives on what they see as the most cost effective and Read More>>

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Open Forums (Discussions: 3)

Last Post: 3D-IC Design Tools and Flow
By Gretchen Patti on Dec. 01, 2011

3D MEMS Forum (Discussions: 2)

Last Post: Re:MEMS and 3D IC integration:...
By Karen Lightman on Oct. 22, 2010

SEMICON West 2010 3D Wrap-up Forum (Discussions: 7)

Last Post: Re:3D Co-Design Challenges (concluded)
By Francoise von Trapp on Aug. 02, 2010

Design Forum (Discussions: 3)

Last Post: Re:DATE 3D Workshop 2010 Previ... (concluded)
By Francoise von Trapp on Feb. 14, 2010

Alchimer's Technology Discussion (Discussions: 3)

Last Post: Overcoming weaknesses in dry p... (concluded)
By Francoise von Trapp on Nov. 08, 2009

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Bob Patti, Tezzaron Semiconductor, at the RTI 3D Architectures for Semiconductor Integration and Packaging 2011

By Q3D Notes on Dec 20, 2011

Bob Patti, CTO, Tezzaron Semiconductor, talks about the challenges and opportunities 3D integr... Read More>>

Markus Wimplinger, EV Group at the RTI 3D Architectures for Semiconductor Integration and Packaging 2011

By Q3D Notes on Dec 20, 2011

Markus Wimplinger, Director Business Unit Technology Development and IP at EV Group, talks abo... Read More>>

Reception at RTI 3D Architectures for Semiconductor Integration and Packaging (3DASIP) 2011

By Francoise von Trapp on Dec 16, 2011

Sponsored by EV Group, this cocktail reception is as vital a part of RTI's 3D ASIP as the te... Read More>>

SEMI High Tech U

By Francoise von Trapp on Aug 3, 2011

In June, I spent a day at SEMI High Tech U in Tempe AZ, at EV Group's North American Headquart... Read More>>

30 Years EVG - Anniversary Celebrations

By EV Group Admin on Dec 23, 2010

Over the past 30 years, EVG has established itself as a leading equipment manufacturer, which ... Read More>>

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CEA-Leti: The Mother Ship Re-visted

By Francoise von Trapp On Jul. 08, 2011

Last time I visited Leti on the Minatec Campus was in October 2009. Recently, when I was back for Leti’s Annual Research Reviews, Mark Scannell, head of the 3D integration program, took me on another tour. A lot has been going on here in the past 2 years. For one thing, the building I saw going up in its early stages has been completed. There’s now a showroom displaying all the nifty Read More>>

3D Integration Research, SEMATECH Style

By Francoise von Trapp On Nov. 21, 2010

SEMATECH’s story is one that is truly built upon the essence of collaboration. SEMATECH is not a traditional research center. Rather, it is a technology research consortium that exists to serve the best interests of its worldwide members and partners. Originally established in Austin, TX as an experiment in combining government and industry to further the development of semiconductor technologies, Read More>>

Canon Marketing Japan: A Causeway to the Japanese Market

By Francoise von Trapp On Nov. 01, 2010

It’s no secret that Japan has its own ideas of how to do pretty much everything. The culture is an interesting mix of ancient tradition, ceremony, modernization, and technological advancement. The centuries-old Imperial Palace and grounds, home to the sitting Emperor, is surrounded by the steel-and-glass cosmopolitan city of Tokyo. A complex, intricate, state-of-the-art public transportation Read More>>

SPTS: A Wild Ride to Success

By Francoise von Trapp On Sep. 02, 2010

A year ago, things weren’t looking so great for Aviza Technologies. According to Kevin Crofton, executive VP, SPTS and managing director of the UK division, the company was in Chapter 11, mainly because its thermal division in Scotts Valley was heavily DRAM focused and was deeply affected when that market collapsed. Then to add fuel to the fire, Qimonda, one of its main customers, went into Read More>>

EV Group: "Triple I" at Work

By Francoise von Trapp On Aug. 09, 2010

It’s a good story that’s been 30 years in the making. From its founding by Erich and Aya Maria Thallner in 1980 and subsequent launch of the world’s first double-sided mask aligner for the emerging MEMS market five years later; to its most recent industry-first launch of a fully-automated wafer bonding system for high-brightness light emitting diode (HB-LED) manufacturing; EV Group has adhered Read More>>

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SEMATECH to conduct rigorous manufacturability assessments to enable high volume manufacturing readiness of 3D technology

By Q3D Notes On Jan. 16, 2012

To enable high-volume production readiness of 3D-based products, SEMATECH’s 3D Interconnect and Manufacturability programs will be conducting Equipment Maturity Assessments (EMAs) of several critical 3D tools during 2012 to establish functional equipment capabilities and address high volume manufacturing maturity issues. The assessment is a cooperative effort among experts from SEMATECH’s 3D program, Read More>>

STATS ChipPAC Expands Manufacturing Presence in Singapore with a New Factory

By Q3D Notes On Jan. 09, 2012

STATS ChipPAC Ltd., semiconductor test and advanced packaging service provider, today held the groundbreaking ceremony for a new factory in Singapore. The new 197,000 square foot building will be located next to the Company’s current factory in Yishun, Singapore and will enable STATS ChipPAC to expand its manufacturing capabilities for advanced wafer level technologies including embedded Wafer Read More>>

Sales of Amkor Technology’s Next Generation Through Mold Via Package-on-Package Solutions Surpass 100 Million Units

By Q3D Notes On Dec. 20, 2011

Amkor Technology, Inc. , a leading provider of semiconductor assembly and test services, today announced that its innovative Through Mold Via (TMV®) Package-on-Package (PoP) solutions have surpassed 100 million units shipped. “This is a significant milestone for a technology we launched just last year,” said Mike Lamble, Amkor’s executive vice president, worldwide sales and product management. Read More>>

SEMATECH’S 3D ENABLEMENT CENTER FOCUSES ON ADDRESSING CHALLENGES FACING FUTURE HIGH VOLUME 3D APPLICATIONS

By Q3D Notes On Dec. 20, 2011

SEMATECH’s 3D Enablement Center (3D EC), together with the Semiconductor Industry Association (SIA) and Semiconductor Research Corporation (SRC), has identified the top technical challenges for new “killer” applications to enable future development of heterogeneous 3D integration beyond mobile wide I/O DRAM. Following the introduction of the wide I/O DRAM, further research and development of Read More>>

Rambus and ITRI Collaborate to Develop Interconnect and Advanced 3D Packaging Technologies

By Q3D Notes On Dec. 16, 2011

Rambus Inc, one of the world's premier technology licensing companies, announced today it is engaging with the Industrial Technology Research Institute (ITRI) in Taiwan, one of the world's leading research institutes, on the development of interconnect and 3D packaging technologies. In addition, Rambus has joined the Advanced Stacked-System Technology and Application Consortium (Ad-STAC), a multinational Read More>>

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