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This topic center focuses on the latest developments, acheivements, and successes for our partners involved in developing technology processes for 3D integration schemes.

 
 

Blogs

From Different Dimensions
Jan. 23, 2012
In today's post on his blog on MonolithIC 3D, Chief Scientist, Deepak Sekar, discusses why TSV pitches smaller than 500nm are useful and how one can achieve that. Evolutionary advances with today's TSV technology as well as radically new monolithic 3D approaches are options:The Silicon Valley IEEE Components, Packaging and Manufacturing Technology (CPMT) Society invited me to give a talk on " Read More>>
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3D Processes In-Depth (36 postings)

Most Recent
 
By Francoise von Trapp On Jan. 18, 2012
Earlier this week, Mitsubishi Heavy Industries, Ltd. announced it had “developed the world's first fully automated 12-inch (300 millimeters) wafer bonding machine, capable of producing 3-dimensionally integrated LSI (large-scale integration) circuits at room temperature.” This tool is targeted to the MEMS, 3D LSI's, and the RF market. I was skeptical of the words “world’s first” when I know Read More>>
By Francoise von Trapp On Dec. 21, 2011
At RTI’s 3D ASIP last week, I sat down with Paul Enquist, of Ziptronix, to get an update on the company’s progress with its direct bonding technologies.  Paul presented on Day 2 of the conference, but honored me with a one-on-one explanation on the application space enabled by the company’s two proprietary processes, Zibond and Direct Bond Interconnect (DBI).  Zibond is the direct oxide bond Read More>>
By Francoise von Trapp On Dec. 20, 2011
The supply chain business model for manufacturing 3D stacked ICS has caused perhaps one of the hottest debates so far in commercializing 3D semiconductor processes.  It’s easy to see why. Beyond the rather obvious question of who will own the liability of damaged devices, there’s a good deal of revenue at stake for those who make the investment in adding capacity for middle end of the line (MEOL) Read More>>
By Francoise von Trapp On Nov. 03, 2011
Earlier this week Invensas Corporation, a wholly-owned subsidiary of Tessera Technologies, Inc., announced both its acquisition of ALLVIA’s patent assets, and a two-year collaborative partnership with ALLVIA to further develop technology and intellectual property (IP) in the 3-dimensional integrated circuit (3D-IC) packaging space.  This strategic alliance is expected to optimize the strengths of Read More>>
By Francoise von Trapp On Oct. 13, 2011
To listen to John Lau, of ITRI, speak on the topic of 3D integration is to experience a passion for technology that rivals no other; except perhaps that of Rao Tummala of Georgia Tech.  But John is definitely more vocal in his passion. Rao has a softer, gentler approach.  At this year’s IWLPC in Santa Clara, both expressed their perspectives on what they see as the most cost effective and Read More>>
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Press Releases (86 postings)

Most Recent
 
By Q3D Notes On Jan. 16, 2012
To enable high-volume production readiness of 3D-based products, SEMATECH’s 3D Interconnect and Manufacturability programs will be conducting Equipment Maturity Assessments (EMAs) of several critical 3D tools during 2012 to establish functional equipment capabilities and address high volume manufacturing maturity issues. The assessment is a cooperative effort among experts from SEMATECH’s 3D program, Read More>>
By Q3D Notes On Dec. 20, 2011
SEMATECH’s 3D Enablement Center (3D EC), together with the Semiconductor Industry Association (SIA) and Semiconductor Research Corporation (SRC), has identified the top technical challenges for new “killer” applications to enable future development of heterogeneous 3D integration beyond mobile wide I/O DRAM. Following the introduction of the wide I/O DRAM, further research and development of Read More>>
By Q3D Notes On Dec. 09, 2011
Honeywell Microelectronics and Tezzaron Semiconductor are working together to produce a new range of radiation-hardened (rad hard) integrated circuits.  Honeywell’s sturdy, well-qualified S150 processwill use Tezzaron’s 3D stacking to greatly increase circuit density without migrating to a smaller node.  The resulting three-dimensional integrated circuits (3D-ICs)are also expected to use Read More>>
By Q3D Notes On Dec. 06, 2011
The A*STAR Institute of Microelectronics (IME) and Tezzaron Semiconductor, a leader in 3D-ICs, have today announced a research collaboration agreement to develop and exploit advanced Through Silicon Interposer (TSI) technology. The two organizations will improve and refine the design and manufacture of silicon interposers and work to standardize the process, flows, and process design kits (PDKs). Initial Read More>>
By Q3D Notes On Nov. 30, 2011
MonolithIC 3D Inc., a Silicon Valley startup, announced today that it has been issued its fifth patent on monolithic 3D-IC technology. The patent describes techniques to obtain low-cost monolithic 3D logic chips with single crystal silicon transistors and high vertical connectivity. In addition to the 5 issued patents, the company has more than 50 other patents pending, making it one of the key players Read More>>
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Forums (6 forums , 17 discussions)

Forum Structure
 

Last Post: Re:3D Co-Design Challenges (concluded)
By Francoise von Trapp on Aug. 02, 2010
3D MEMS Forum (Discussions: 2)
Last Post: Re:MEMS and 3D IC integration:...
By Karen Lightman on Oct. 22, 2010
Open Forums (Discussions: 2)
Last Post: Re:Alchimer study quantifies v... (concluded)
By Francoise von Trapp on Nov. 16, 2009
3D Packaging Forum (Discussions: 3)
Last Post: Re:Updates on Package on Packa... (concluded)
By Francoise von Trapp on Apr. 05, 2010
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Sponsored Site Tour (7 postings)

Most Recent
 
By Francoise von Trapp On Jul. 08, 2011
Last time I visited Leti on the Minatec Campus was in October 2009.  Recently, when I was back for Leti’s Annual Research Reviews, Mark Scannell, head of the 3D integration program, took me on another tour. A lot has been going on here in the past 2 years. For one thing, the building I saw going up in its early stages has been completed.  There’s now a showroom displaying all the nifty Read More>>
By Francoise von Trapp On Nov. 21, 2010
SEMATECH’s story is one that is truly built upon the essence of collaboration.  SEMATECH is not a traditional research center.  Rather, it is a technology research consortium that exists to serve the best interests of its worldwide members and partners. Originally established in Austin, TX as an experiment in combining government and industry to further the development of semiconductor technologies, Read More>>
By Francoise von Trapp On Sep. 02, 2010
A year ago, things weren’t looking so great for Aviza Technologies. According to Kevin Crofton, executive VP, SPTS and managing director of the UK division, the company was in Chapter 11, mainly because its thermal division in Scotts Valley was heavily DRAM focused and was deeply affected when that market collapsed. Then to add fuel to the fire, Qimonda, one of its main customers, went into Read More>>
By Francoise von Trapp On Aug. 09, 2010
It’s a good story that’s been 30 years in the making. From its founding by Erich and Aya Maria Thallner in 1980 and subsequent launch of the world’s first double-sided mask aligner for the emerging MEMS market five years later; to its most recent industry-first launch of a fully-automated wafer bonding system for high-brightness light emitting diode (HB-LED) manufacturing; EV Group has adhered Read More>>
By Francoise von Trapp On Nov. 09, 2009
It’s only fitting that Replisaurus’s equipment division, SET Smart Equipment Technology, which is located in Saint Jeoire, France, found its way into the Tour de France in 3D. After all, the town is on the route of the real Tour de France. Read More>>
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Topic Centers

3D Design, Test and Inspection
3D Devices
3D Manufacturing Equipment
3D Materials
3D Processes and Technology
3D R&D and Collaboration
 
 

White Papers (23 files)

3D_Integration_Panel_DiscussionMASTER.pptx Will 2.5D and 3D Compete or Coexist? 11/02/2011 9:54am
NEXX Systems White Papers (1) 11/02/2010 12:23pm
Semicon West 2010 WorkshopAlchimer.pdf Alchimer Workshop Focuses on Cost-effective TSVs 07/27/2010 2:29am
SET- SAS White Papers (4) 04/30/2010 5:46am
SUSS MicroTec White Papers (3) 04/01/2010 11:15am
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Visit our Partners in 3D

MEMS Industry Group

 

Chip Scale Review

 

SEMATECH

 

3D Test Workshop

 

IWLPC 2011

 

GSA 3D Working Group

 

 
 

Audio/Video (16)

Most Recent
 

Bob Patti, Tezzaron Semiconductor, at the RTI 3D Architectures for Semiconductor Integration and Packaging 2011
By Q3D Notes on Dec 20, 2011

Bob Patti, CTO, Tezzaron Semiconductor, talks about the challenges and opportunities 3D integr... Read More>>

SEMI High Tech U
By Francoise von Trapp on Aug 3, 2011

In June, I spent a day at SEMI High Tech U in Tempe AZ, at EV Group's North American Headquart... Read More>>

SEMATECH 3D Interconnect program - Plating tool
By Francoise von Trapp on Nov 22, 2010

The Nexx Stratus300 is a fully automated electro-deposition system for advance packaging appli... Read More>>

SEMATECH 3D Interconnect program - All Surface Inspection
By Francoise von Trapp on Nov 22, 2010

Detects particles, chips and scratches as small as two microns on the top, bottom and edge bev... Read More>>

SEMATECH 3D Interconnect program - Wafer bonding tool
By Francoise von Trapp on Nov 22, 2010

The Gemini is a fully automated 300mm wafer bonding tool. It also has modules for precision wa... Read More>>

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Activities

Dieter Beisiegel joined the 3D Processes and Technology site.
Gary Borges joined the 3D Processes and Technology site.
Moti Yanuka joined the 3D Processes and Technology site.
Francoise von Trapp created the posting Mitsubishi Throws its Hat in the 300mm Wafer Bonding Ring.
Q3D Notes created the posting SEMATECH to conduct rigorous manufacturability assessments to enable high volume manufacturing readiness of 3D technology.
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