By Francoise von Trapp On Oct. 06, 2009

As the feasibility of TSVs has been well established in the semiconductor industry, the focus has now shifted to the manufacturability and integration of all the different building blocks for TSVs and 3D Interconnects. At this year’s IMAPS International 2009, Nov 1-5 , San Jose CA, Dr. Thorsten Matthias, Director of Technology, EVG North America. Read More>>

By Francoise von Trapp On Sep. 15, 2009

Up until recently, the only available methodologies for performing necessary metallization steps for fabricating through-silicon vias (TSVs) relied on conventional dry processes like physical vapor deposition (PVD), chemical vapor deposition (CVD) and atomic layer deposition (ALD). These processes each have weaknesses such as low throughput and high cost. In July 2009, Alchimer S.A. Read More>>

By Francoise von Trapp On Sep. 25, 2009

The cost and technology limitation of continuous planar scaling is changing the current semiconductor landscape. As such, device manufacturers and wafer foundries are looking to advanced packaging solutions to meet the next generation device performance requirements. Emerging 3D integration technologies such as through silicon via (TSV) are expected to play a critical role in driving the cost and performance requirements for leading edge consumer applications. However, the success of these developments relies on increased collaboration between the supply chain partners. Read More>>