By Francoise von Trapp On Dec. 07, 2009
Testing 3D chips has been identified by many industry experts as one of the more elusive issues facing market adoption of 3D integration technologies, particularly 3D IC using through-silicon via Read More>>
By Francoise von Trapp On Mar. 22, 2010
Panelists and Participants: Welcome to the 3D system-in-package (3D SiP) discussion in this week’s 3D Packaging update forum. Please join in the discussion by logging in and posting your questions and comments here. Read More>>
By Francoise von Trapp On Mar. 22, 2010
Panelists and Participants: Welcome to the 3D wafer-level packaging (3D WLP) discussion in this week’s 3D Packaging update forum. Please join in the discussion by logging in and posting your questions and comments here. Read More>>
By Francoise von Trapp On Apr. 21, 2010
By design, MEMS devices are already 3D stuctures, so when we talk about 3D MEMS, we’re actually talking about the integration of ICs and multiple MEMS sensors in the third dimension to create advanced “smart” systems. Read More>>
By Francoise von Trapp On Mar. 22, 2010
Panelists and Participants: Read More>>